SUMMARY FEATURES ? Field Programmable Radio Frequency （FPRF） chip ? Dual transceiver ideal for MIMO ? User programmable on the fly ? Continuous coverage of the 100 kHz - 3.8 GHz RF frequency range ? Digital interface to baseband with on chip integrated 12 bit D/A and A/D converters ? Programmable RF modulation bandwidth up to 160 MHz using analog interface ? Programmable RF modulation bandwidth up to 60 MHz using digital interface ? Supports both TDD and full duplex FDD ? LimeLight? digital IQ interface – JEDEC JESD207 TDD and FDD compliant ? Transceiver Signal Processor block employs advanced techniques for enhanced performance ? Single chip supports 2x2 MIMO. Multiple chips can be used to implement higher order MIMO ? On-chip RF calibration circuitry ? Fully differential baseband signals， analog IQ ? Few external components ? Low voltage operation， 1.25， 1.4 and 1.8V. Integrated LDOs to run on a single 1.8V supply voltage ? On chip integrated microcontroller for simplified calibration， tuning and control ? Integrated clock PLL for flexible clock generation and distribution ? User definable analog and digital filters for customised filtering ? RF and base band Received Signal Strength Indicator （RSSI） ? 261 pin aQFN 11.5x11.5 mm package ? Power down option ? Serial port interface ? Low power consumption， typical 880mW in full 2x2 MIMO mode （550mW in SISO mode） using external LDOs ? Multiple bypass modes for greater flexibility APPLICATIONS ? Broad band wireless communications ? GSM， CDMA2000， TD-SCDMA， WCDMA/HSPA， LTE ? IEEE? xxx.xxx radios ? WiFi operating in the Whitespace frequencies ? Software Defined Radio （SDR） ? Cognitive Radio ? Unmanned Aerial Vehicle （UAV） ? Other Whitespace applications

GENERAL DESCRIPTION LMS7002M is a fully integrated, multi-band, multi-standard RF transceiver that is highly programmable. It combines Low Noise Amplifiers (RXLNA), TX Power Amplifier Drivers (TXPAD) receiver/transmitter (RX/TX) mixers, RX/TX filters, synthesizers, RX gain control, TX power control, the analog-to-digital and digital-toanalog convertors (ADC/DACs) and has been designed to require very few external components. The top level architecture of LMS7002M transceiver is shown in Figure 1. The chip contains two transmit and two receive chains for achieving a Multiple In Multiple Out (MIMO) platform. Both transmitters share one PLL and both receivers share another. Transmit and receive chains are all implemented as zero Intermediate Frequency (zero IF or ZIF) architectures providing up to 160MHz RF modulation bandwidths (equivalent to 80MHz baseband IQ bandwidth). For the purpose of simplifying this document, the explanation for the functionality and performance of the chip is based on one transmit and one receive circuitry, given that the other two work in exact the same manner.?