以電源網(wǎng)絡(luò)節(jié)點(diǎn)之間的電氣距離為基礎(chǔ)，應(yīng)用多重網(wǎng)格方法，提出了一種快速的電源網(wǎng)格分析器；設(shè)計(jì)了一個(gè)簡(jiǎn)單的限制和插值方案，速度收斂可以通過(guò)電氣距離閥值和前/后段濾波迭代次數(shù)來(lái)控制。基于電源網(wǎng)格節(jié)點(diǎn)間電氣距離方案的特點(diǎn)在于直觀、簡(jiǎn)單、易于實(shí)現(xiàn)，實(shí)驗(yàn)結(jié)果較好地證明了該方法的可行性。Power grid analysis is an important issue for circuit design and verification. With the increasing number of transistors on a chip, the size of the power networks has grown so large as to make the verification task very challenging. Fast and memory-saving power analysis algorithms are needed. In this paper, we present a fast power grid analyzer using multigrid technique, which speed up the convergence of sparse iterative solver. we proposed a simple and intuitive restriction and interpolation scheme, which is based on the electric distance between the nodes in the power grid network. The convergence can be controlled by a user specified threshold parameter and pre/post smoothing iterations. Experimental results show the efficiency of the new method.